1. Field of the Invention
The present invention generally relates to semiconductor packages, and more specifically, to a heat dissipation semiconductor package that integrates with a heat dissipation member.
2. Description of Related Art
To meet the demand for smaller, thinner, and lighter electronic products, semiconductor packages that reduce IC area and bear high-density and high-pin features, such as ball grid array (BGA), have become the mainstream in the market of semiconductor packages. This kind of semiconductor packages have relatively high density of electronic circuits and electronic components and therefore generate a relatively great amount of heat during operation. Besides, this kind of semiconductor packages use an encapsulant of low thermal conductivity to encapsulate semiconductor chips and therefore, more often than not, performance of the semiconductor chips are adversely affected due to inefficient heat dissipation.
In order to enhance heat dissipation of semiconductor packages, the semiconductor industry developed techniques of incorporating heat dissipation structures into the semiconductor packages, and related techniques were disclosed by U.S. Pat. Nos. 6,552,428, 6,400,014, 6,472,743, 5,977,626, 5,851,337, 6,236,568, 6,507,116, 5,672,548, 6,744,132, 6,403,882, and so on.
Please refer to FIG. 1, which is a cross-sectional view of a semiconductor package with an exposed heat spreader according to U.S. Pat. No. 6,552,428. As shown in the drawing, a heat spreader 12 is mounted on a substrate 10. The heat spreader 12 comprises a lower portion 123 with an opening 123a formed in the middle thereof, an upper portion 121, and connection parts 122 that connect periphery of the opening 123a of the lower portion 123 and edges of the upper portion 121, wherein the lower portion 123 has a plurality of supportive legs 123b at proper locations, through which the heat spreader 12 stands on the substrate 10 and the upper portion 121 of the heat spreader 12 is spaced apart from the substrate 10 by a predetermined distance. As a result, the top surface of the upper portion 121 is exposed from the encapsulant with a view to dissipating the heat generated by the chip 11 in operation.
However, in the aforementioned semiconductor package, heat generated by a chip in operation has to be dissipated by means of the encapsulant. The encapsulant is made of material of low thermal conductivity, with a low thermal conductivity coefficient of 0.8 w/m° K. Therefore, heat generated by a chip in operation is not effectively transmitted to the heat spreader but accumulates, thereby adversely affecting the performance and life of the chip.
Referring to FIG. 2, in view of the aforementioned drawbacks of the prior art, a heat dissipation semiconductor package with a heat dissipation structure 23 is disclosed by U.S. Pat. No. 5,977,626. The heat dissipation structure 23 comprises: a flat section 230, top of which is exposed from an encapsulant 24; a plurality of supportive sections 231 for supporting the flat section 230 above a semiconductor chip 21; and a plurality of contact sections 232, which extends from bottom of the supportive sections 231 and is attached to a plurality of protruding sections 237 of the substrate 20; wherein the supportive sections 231 are located around outer periphery of the flat section 230 and extend gradually outward and downward to the contact sections 232 to form a trough-shaped space 28 for receiving the semiconductor chip 21. In addition, a protruding section 234 extending downward from the flat section 230 of the heat dissipation structure 23 and contacting the semiconductor chip 21 is formed such that heat generated by the chip 21 in operation can be directly dissipated and transferred to the atmosphere via the protruding section 234 and the flat section 230 of the heat dissipation structure 23 rather than dissipated via the encapsulant 24 of low thermal conductivity.
However, in the encapsulation molding process of the aforementioned semiconductor package, in order to avoid overflow of the encapsulant, the inner top wall of the applied encapsulation mold must be in tight contact with and abuts against the flat section of the heat dissipation structure. If the inner top wall of the encapsulation mold abuts against the heat dissipation structure too forcefully, the chip below the heat dissipation structure may easily break for bearing excessively great pressure from the protruding section.
In order to circumvent the abovementioned problems, U.S. Pat. No. 6,403,882 discloses another heat dissipation semiconductor package. As shown in FIG. 3A, the heat dissipation semiconductor package comprises: a chip 31 having an active surface 36 and an opposing non-active surface 37, wherein the non-active surface 37 has a heat conductive adhesive 32 of low elastic modulus formed thereon, and the heat conductive adhesive 32 covers the non-active surface 37 of the chip 31 fully; a protective board 33 bonded to the non-active surface 37 of the chip 31 via the heat conductive adhesive 32; and a chip carrier 30 bonded to the active surface 36 of the chip 31. The heat conductive adhesive is intended to improve the thermal resistance of the chip.
Referring to FIG. 3B, an encapsulation molding process is performed so as to form encapsulant 34 encapsulating the chip. The heat conductive adhesive 32 covers the non-active surface 37 of the chip 31 fully. As a result, an interface formed between the encapsulant 34 encapsulating the chip 31 and the heat conductive adhesive 32 is limited to the side edge of the heat conductive adhesive 32. Accordingly, delamination D easily occurs to the interface due to expansion/contraction in a thermal cycle. Also, propagation of delamination easily occurs along the interface, thus leading to delamination between the chip 31 and the encapsulant 34. Furthermore, since the area of contact between the encapsulant 34 and the chip 31 is limited to the side edge of the chip 31, adhesive force is notably inadequate. Therefore, the delamination further propagates to the active surface 36 of the chip 31, thus leading to damage of the conductive bumps 35 for electrically connecting the chip 31 to the chip carrier 30.
In view of the above, it has become urgent to provide a technique which provides simple fabrication method for fabricating heat dissipation semiconductor package at low cost and effectively overcoming the drawbacks of the conventional semiconductor packages as mentioned above.